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Research

My research at the University of Glasgow focuses on AI compilers. My work aims to empower the hardware-software co-design by developing advanced and adaptive AI Compilers focusing one memory and compute.

Research Themes

Key areas of focus and contribution

AI Compilers & Optimization

Developing adaptive compiler optimizations that enable AI models to run efficiently across diverse hardware platforms. My work focuses on transfer learning techniques that allow compilers to learn from past optimizations and apply knowledge to new hardware configurations.

Impact:

Enables AI deployment on resource-constrained devices, making advanced AI accessible in healthcare, robotics, and mobile applications.

Edge AI & On-Device Learning

Exploring techniques for deploying AI to edge devices with limited computational resources. This includes developing efficient tiny machine learning solutions and optimizing models for real-time inference on constrained hardware.

Impact:

Brings AI capabilities to devices without constant cloud connectivity, enabling applications in remote areas and improving privacy through local processing.

Ethical AI & Bias Detection

Investigating fairness and bias in AI systems, particularly when deployed on edge devices versus cloud environments. My recent work examines how resource constraints affect model behavior and fairness metrics.

Impact:

Ensures AI systems maintain ethical standards regardless of deployment environment, critical for equitable AI adoption across all devices and communities.

Publications

Research papers and contributions to the field

View all publications on Google Scholar →

LLM-Driven Design Space Exploration of FPGA-based Accelerators

Vinamra Sharma, Xingjian Fu, Jude Haris, José Cano

Workshop on Intelligent System Design (InSyDe), co-located with EuroSys '26 • 2026

Introduces SECDA-DSE, a framework that integrates large language models into the SECDA methodology for automated design space exploration of FPGA-based accelerators. Combines a structured DSE Explorer for accelerator configurations with an LLM stack that uses retrieval-augmented generation and chain-of-thought prompting, plus a feedback loop for reinforced fine-tuning.

Key Takeaway:

Initial high-level synthesis evaluation shows a generated accelerator can meet timing and resource constraints on a Zynq-7000 FPGA.

View PaperGoogle Scholar

EdgeAI Models for Human Activity Recognition on Low-Power Devices

Vinamra Sharma, Danilo Pau, José Cano

Seventh UK Mobile, Wearable and Ubiquitous Systems Research Symposium (MobiUK 2025) • 2025

Presents efficient AI models for human activity recognition optimized for low-power edge devices. Demonstrates significant improvements in energy efficiency while maintaining accuracy.

Key Takeaway:

Achieved 40% reduction in energy consumption while maintaining 95%+ accuracy for activity recognition tasks on constrained devices.

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Biases in Edge Language Models: Detection, Analysis, and Mitigation

Vinamra Sharma, Danilo Pietro Pau, José Cano

arXiv preprint • 2025

Examines fairness of large language models when deployed in resource-constrained environments compared to cloud or desktop settings. Identifies specific biases that emerge in edge deployments and proposes mitigation strategies.

Key Takeaway:

Edge deployments can introduce unique fairness challenges that differ from cloud environments, requiring specialized bias detection and mitigation approaches.

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Best Paper in Track Award

Efficient Tiny Machine Learning for Human Activity Recognition on Low-Power Edge Devices

Vinamra Sharma, Danilo Pau, José Cano

2024 IEEE 8th Forum on Research and Technologies for Society and Industry Innovation (RTSI) • 2024

Introduces novel tiny ML techniques for human activity recognition that achieve high accuracy on microcontrollers and low-power processors. Includes optimization strategies for memory and computational constraints.

Key Takeaway:

Best Paper in Track Award. Demonstrated that sophisticated activity recognition is possible on devices with less than 1MB of memory.

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Best Paper Award

Phishing prevention techniques: past, present and future

Himanshu Gautam, Vishal Kumar, Vinamra Sharma

Proceedings of Integrated Intelligence Enable Networks and Computing: IIENC 2020 • 2021

Comprehensive survey of phishing prevention techniques, analyzing historical approaches and proposing future directions. Covers technical, educational, and policy-based solutions.

Key Takeaway:

Best Research Paper Award. Identified key gaps in current phishing prevention and proposed integrated multi-layered defense strategies.

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Best Paper Award

Institutional Recommendation and Ranking System Based on Integrated Datasets and Analysis

Vishal Kumar, Akanksha Joshi, Vinamra Sharma

2020 International Conference on Advances in Computing and Communication Engineering (ICACCE) • 2020

Presents an integrated system for institutional recommendation and ranking using comprehensive datasets and advanced analysis techniques. Demonstrates improved accuracy in educational institution matching and ranking.

Key Takeaway:

Best Research Paper Award. Developed a comprehensive framework that integrates multiple data sources for more accurate institutional recommendations.

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Research Achievements

Recognition and awards for research contributions

Best Paper in Track Award

IEEE RTSI 2024

2024

For work on efficient tiny machine learning for human activity recognition

Best Research Paper Award

Springer IIENC-2020

2020

Best Research Paper Award

IEEE ICACCE 2020 (Las Vegas)

2020

2nd Prize - Poster Presentation

Empowering Diverse Voices: Shaping Pathways for a Sustainable Future (IEEE)

2024

Interested in Collaboration?

I'm always open to research collaborations, discussions, and opportunities to work with fellow researchers and innovators.

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